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Tukwila is the code-name for a future generation of Intel's Itanium processor family following Itanium 2 and Montecito. It was expected to come to market in late 2008. While its features have not been publicly disclosed in detail, it is said to utilize both multiple processor cores (multi-core) and SMT techniques. The engineers said to be working on this project are from the Alpha project, specifically those working on the Alpha 21464 (EV8), which was focused on SMT.

Named for the city of Tukwila, Washington, Tukwila was previously code-named Tanglewood. However the name coincides with the Tanglewood music festival, and Intel renamed the project in late 2003.

The processor will have four processor cores per die and 30 MB of cache; it may only be able to operate at its rated clock frequency with some of the cores deactivated. In this way it can be configured for highest multithreaded performance or highest single thread performance, while staying within its thermal limits.

The processor should also be the first to contain more than 2 billion transistors on a single die.

Xeon compatibility

It has been publicly disclosed that Tukwila and its associated chipset would bring socket compatibility between Intel's Xeon and Itanium processors, by introducing a new interconnect called Intel QuickPath Interconnect (QuickPath, previously known as Common System Interface or CSI). This ultimate endeavor would help reduce product development costs for both Intel and its partners, by allowing for greater reuse of components and manufacturing processes. Tukwila is reported to have four "full" QuickPath links and two "half" links.

Whitefield, the first Xeon processor to feature QuickPath, suffered significant project delays and was cancelled.